1. Field of the Invention
The present invention relates to a mute circuit for outputting or not outputting an input analog signal according to necessity.
2. Description of the Related Art
It is necessary to smoothly vary outputs of the mute circuit to reduce click noises from occurring when mute mode are changed.
The circuit shown in FIG. 1 has been already known as the above type of the circuit.
As shown in FIG. 1, the mute circuit comprises an inverting circuit 2 including an operational amplifier 1, resistor R11 and R12, a capacitor, and a switch 1 connecting the output of the inverting circuit 2 and ground. An analog signal is supplied to the inverting input terminal of the operational amplifier 1 through the capacitor and the resistor 11, and a mute signal is directly input to the non-inverting input terminal.
In the mute circuit, it is known that a mode of shutdown or reducing power consumption (hereafter referred to as power-down mode), the power-down mode is canceled and power is supplied according to necessity. Operations of the power-down mode are described below.
Under the power-down mode, the operational amplifier 1 is not operated and the switch SW1 closes to fix the output of the operational amplifier 1 to the earth.
When the power-down mode is canceled, the operational amplifier 1 is ready for operations and the switch SW1 opens. Then, a mute signal rises from 0 (V) up to an analog common voltage. Therefore, the operational amplifier 1 outputs a voltage in which an inverting analog input signal is added to the analog common voltage.
In general, the operational amplifier 1 has an offset voltage of several mV to tens of mV. Therefore, when the switch SW1 is opened, and the mode changes from or to the power-down mode, the output of the operational amplifier 1 shifts by the offset voltage and occurs noises.
It is possible to lower or eliminate the offset voltage by increasing the size of a MOS transistor which constitutes the operational amplifier or adding a calibration circuit. However, a disadvantage occurs that the chip size of the operational amplifier 1 is increased.
Moreover, in a conventional circuit, mute signals of 0 (V) to analog common voltage Vc are input to the inverting input terminal of an operational amplifier. Therefore, an operational amplifier needs an input range of 0 (V) to Vc.
Therefore, a mute circuit has been requested which can reduce or eliminate noises generated due to an offset voltage under a mute operation.
It is an object of the present invention to provide a mute circuit in which no click sound is generated even if a power source is turned off.
The present invention a summing amplifier for an inverting analog input signal and a mute signal, the summing amplifier for outputting sum of the inverted input signal and mute signal; a switch for connecting the output of the summing amplifier to the ground voltage; and a mute signal generating circuit capable of stepping down the output of said summing amplifier to the ground voltage; wherein the mute signal generating circuit generates a predetermined voltage for canceling the offset voltage generated by the summing amplifier.
As an aspect of the present invention, the above summing amplifier comprises a first operational amplifier having an inverting input terminal, a non-inverting input terminal, and an output terminal; a first resistor connected to the inverting input terminal of the first operational amplifier to supply the analog input signal; a second resistor connected to the inverting input terminal of the first operational amplifier to supply the mute signal; and a feedback resistor connected between the inverting input terminal and the output terminal of the first operational amplifier, the non-inverting input terminal of the first operational amplifier being supplied the analog common voltage.
As another aspect of the present invention, a capacitive element is connected between a terminal for inputting the analog signal and the first resistor.
As still another aspect of the present invention, the mute signal generating circuit further comprises a selecting circuit for selecting either of the analog common voltage and the ground voltage, the selected voltage being supplied to the mute signal generating circuit; a comparing circuit for comparing the level of the mute signal generated by the mute signal generating circuit with a reference level; and a control circuit for controlling the selecting circuit based on the output of the comparing circuit.
As still another aspect of the present invention, the mute signal generating circuit comprises; a second operational amplifier having an inverting input terminal, a non-inverting input terminal, and an output terminal; a third resistor connected to the inverting input terminal of the second operational amplifier to supply the analog common voltage or the ground voltage selected by the selecting circuit; and a feedback resistor connected between the inverting input terminal and the output terminal of the second operational amplifier, the non-inverting input terminal of the second operational amplifier being supplied the analog common voltage; and the mute signal generating circuit generates a mute signal for canceling the offset voltage of the first operational amplifier.
As still another aspect of the present invention, the selecting circuit comprises a first switch for connecting the output terminal of the selecting circuit to an analog common voltage via a first resistor, a second switch for connecting the output terminal of the selecting circuit to the ground voltage via a second resistor, and a capacitor connected to the output terminal of the selecting circuit; and outputs of the output terminal are varied with the time constant of the first and second resistors and capacitors.
As described above, the present invention includes a summing amplifier, a switch, and a mute signal generating circuit.
Therefore, the present invention is possible to reduce or eliminate noises generated due to the offset voltage generated by a summing amplifier under a mute operation.